Project Timeline

Semester windows: Fall (now → Dec 12), Spring (Jan 5 → Apr 24). PCB fabrication & assembly and enclosure targets by Dec 12.

Power Testing

Idle current

DurationAvg current
1 min 16 mA
5 min 16 mA
20 min 16 mA

Deep sleep

DurationAvg current
1 min82.8 uA
5 min82.8 uA
20 min82.8 uA

Bluetooth TX power

Coming soon — will list TX power vs current draw / duty cycle.

Notes

As new test suites complete, summaries or charts can appear here (e.g., packet timing, NFC). For now this is a placeholder.